mt90528ag2 Zarlink Semiconductor, mt90528ag2 Datasheet - Page 148

• Manufacturer Part Number: mt90528ag2
• Description: 28-port Primary Rate Circuit Emulation Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Address: 4016 (Hex)
Label: UICC
Reset Value: 0000 (Hex)
Address: 4200 + p*4 (Hex)
Label: UVC_Pp (where p represents the port number)
Reset Value: 0000 (Hex)
Address: 4202 + p*4 (Hex)
Label: UVP_Pp (where p represents the port number)
Reset Value: 0000 (Hex)
CELL_CNT
OAM_SEL
UDT_VCI
UDT_VPI
Reserved
Label
Label
Label
Position
Position
Position
15:13
15:0
15:0
11:0
Bit
Bit
Bit
12
Type
Type
Type
R/W
R/W
R/W
R/O
R/O
Table 73 - UDT VCI for Port p (one per port)
Table 74 - UDT VPI for Port p (one per port)
Table 72 - UTOPIA Incoming Cell Counter
Counter indicating the number of cells received by the UTOPIA interface. If this counter
rolls over, the CELL_CNT_ROLL_STATUS status bit in the UTOPIA Status Register at
4012h will be set.
Note: This counter counts the number of SOC signals detected at the incoming UTOPIA
interface. Therefore, both “good” and errored cells are counted.
UDT VCI for TDM port p.
The VCI value of the incoming cell is compared to this value to determine if the cell is des-
tined for port p.
UDT VPI for TDM port p.
The VPI value of the incoming cell is compared to this value to determine if the cell is des-
tined for port p. In UNI mode, only the 8 least significant bits of this field are used for the
comparison. In NNI mode, all 12 bits are used.
OAM select for port p.
When set, OAM cells with matching VPI/VCI are sent to the Receive Data Cell Buffer.
When cleared, OAM cells arriving on this VC are discarded.
Always reads “000”.
Zarlink Semiconductor Inc.
MT90528
148
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