tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 157

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tfra08c13

Manufacturer Part Number
tfra08c13
Description
Tfra08c13 Octal T1/e1 Framer
Manufacturer
ETC-unknow
Datasheet
Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Framer Register Architecture
CEPT Time Slot 16 X-Bit Remote Multiframe Alarm and AIS Control Register (FRM_PR41)
The default value of this register is 00 (hex).
Table 145. CEPT Time Slot 16 X-Bit Remote Multiframe Alarm and AIS Control Register (FRM_PR41) (Y89)
Framer Exercise Register (FRM_PR42)
This register is used for exercising the device in test mode. Setting the framer exercise bits 0—5 as described in
Table 146 causes the specified error condition to be generated. In normal operation, it should be set to 00 (hex).
The default value of this register is 00 (hex).
Table 146. Framer Exercise Register (FRM_PR42) (Y8A)
0—2
FEX6
Bit
FEX0—FEX5
3
4
5
6
7
0
0
1
1
Bit
TTS16X0—TTS16X2 Transmit Time Slot 16 X0—X2 Bits. The content of these bits are written into
ALTTS16RMFA
FEX7
TLTS16RMFA
TLTS16AIS
0
1
0
1
Symbol
XS
Framer Exercise Bits 0—5 (FEX0—FEX5). See Table 147.
1 s Pulse.
500 ms Pulse.
100 ms Pulse.
Reserved.
Pulse wide Interval.
CEPT signaling multiframe time slot 16 X bits.
X-Bit Source. A 1 enables the TTS16X[2:0] bits to be written into CEPT time slot
16 signaling multiframe frame. A 0 transmits the X bits transparently.
Automatic Line Transmit Time Slot 16 Remote Multiframe Alarm. A 1
enables the transmission of CEPT time slot 16 signaling remote multiframe alarm
when the receive framer is in the loss of CEPT signaling (RTS16LMFA) state.
Transmit Line Time Slot 16 Remote Multiframe Alarm. A 1 enables the trans-
mission of CEPT time slot 16 signaling remote multiframe alarm.
Transmit Line Time Slot 16 AIS. A 1 enables the transmission of CEPT time
slot 16 alarm indication signal.
Reserved. Write to 0.
(continued)
Description
Description
TFRA08C13 OCTAL T1/E1 Framer
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