tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 183

• Manufacturer Part Number: tfra08c13
• Description: Tfra08c13 Octal T1/e1 Framer
• Manufacturer: ETC-unknow

Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Register Maps
Transmit Signaling Registers (Read/Write)
The address of the registers is shown with the most significant digit, designated by Y, which is used to identify each
framer (for framer 1—framer 8, Y = 2—9, respectively).
Table 185. Transmit Signaling Registers Map
1. In the normal DS1 robbed-bit signaling modes, these bits define the corresponding receive channel signaling mode and are
2. These bits contain unknown data.
3. In DS1 4-state and 2-state signaling modes, these bits contain unknown data.
4. In DS1 2-state signaling mode, these bits contain unknown data.
5. In the CEPT signaling modes, the A-, B-, C-, D-, and P-bit information of these registers contains unknown data.
6. In the DS1 signaling modes, these registers contain unknown data.
7. Signifies known data.
FRM_TSR16
FRM_TSR24
FRM_TSR25
FRM_TSR26
FRM_TSR27
FRM_TSR28
FRM_TSR29
FRM_TSR30
FRM_TSR31
FRM_TSR10
FRM_TSR12
FRM_TSR13
FRM_TSR14
FRM_TSR15
FRM_TSR17
FRM_TSR18
FRM_TSR19
FRM_TSR20
FRM_TSR21
FRM_TSR22
FRM_TSR23
FRM_TSR0
FRM_TSR11
copied into the received signaling registers. In the CEPT signaling modes, these bits are ignored.
FRM_TSR1
FRM_TSR2
FRM_TSR3
FRM_TSR4
FRM_TSR5
FRM_TSR6
FRM_TSR7
FRM_TSR8
FRM_TSR9
Signaling
Transmit
5
5
6
6
6
6
6
6
6
6
Read (COR)
Write (W)
Read (R)
Clear on
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(continued)
Bit 7
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
Bit 6
G_10
G_12
G_13
G_14
G_15
G_16
G_17
G_18
G_19
G_20
G_21
G_22
G_23
G_11
G_0
G_1
G_2
G_3
G_4
G_5
G_6
G_7
G_8
G_9
X
X
X
X
X
X
X
X
7
1
Bit 5
F_10
F_12
F_13
F_14
F_15
F_16
F_17
F_18
F_19
F_20
F_21
F_22
F_23
F_11
F_0
F_1
F_2
F_3
F_4
F_5
F_6
F_7
F_8
F_8
X
X
X
X
X
X
X
X
1
Bit 4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
Bit 3
D_10
D_12
D_13
D_14
D_15
D_16
D_17
D_18
D_19
D_20
D_21
D_22
D_23
D_24
D_25
D_26
D_27
D_28
D_29
D_30
D_31
D_11
D_0
D_1
D_2
D_3
D_4
D_5
D_6
D_7
D_8
D_8
3
TFRA08C13 OCTAL T1/E1 Framer
Bit 2
C_10
C_11
C_12
C_13
C_14
C_15
C_16
C_17
C_18
C_19
C_20
C_21
C_22
C_23
C_24
C_25
C_26
C_27
C_28
C_29
C_30
C_31
C_0
C_1
C_2
C_3
C_4
C_5
C_6
C_7
C_8
C_8
3
Bit 1
B_10
B_11
B_12
B_13
B_14
B_15
B_16
B_17
B_18
B_19
B_20
B_21
B_22
B_23
B_24
B_25
B_26
B_27
B_28
B_29
B_30
B_31
B_0
B_1
B_2
B_3
B_4
B_5
B_6
B_7
B_8
B_8
4
A_16
A_25
A_31
A_10
A_11
A_12
A_13
A_14
A_15
A_17
A_18
A_19
A_20
A_21
A_22
A_23
A_24
A_26
A_27
A_28
A_29
A_30
Bit 0
A_0
A_1
A_2
A_3
A_4
A_5
A_6
A_7
A_8
A_8
Register Address
Framer 1—8
(hex)
YEB
YED
YFD
YE1
YE3
YE5
YE7
YE9
YEF
YF1
YF3
YF5
YF7
YF9
YFB
YFF
YEA
YEC
YEE
YFC
YE0
YE2
YE4
YE6
YE8
YF0
YF2
YF4
YF6
YF8
YFA
YFE
183