tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 26

• Manufacturer Part Number: tfra08c13
• Description: Tfra08c13 Octal T1/e1 Framer
• Manufacturer: ETC-unknow

TFRA08C13 OCTAL T1/E1 Framer
Pin Information
Table 2. Pin Descriptions (continued)
26
† After RESET is deasserted, the channel is in the default framing mode, as a function of the DS1/CEPT pin.
‡ Asserting this pin low will initially force RDY to a low state.
* I
u
indicates an internal pull-up, I
AD12
AE14
AC14
AD13
AE15
AE16
AF14
AF15
Pins
AC5
AD5
AC7
AD6
AD7
AC9
U25
U23
AE6
AF6
AE7
AF7
AE8
AF8
V24
ALE_AS
Symbol
WR_DS
(continued)
CS
A10
A11
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
‡
d
indicates an internal pull-down.
Type*
I/O
I
I
I
I
Write (Active-Low). In the Intel mode, the value present on the data
bus is latched into the addressed register on the positive edge of the
signal applied to WR.
Data Strobe (Active-Low). In the Motorola mode, when AS is low and
R/W is low (write), the value present on the data bus is latched into the
addressed register on the positive edge of the signal applied to DS;
when AS is low and R/W is high (read), the TFRA08C13 drives the data
bus with the contents of the addressed register while DS is low.
Chip Select (Active-Low). In the Intel interface mode, this pin must be
asserted low to initiate a read or write access and kept low for the dura-
tion of the access; asserting CS low forces RDY out of its high-imped-
ance state into a 0 state.
Address Strobe (Active-Low). In the Motorola interface mode, this pin
must be asserted low to initiate a read or write access and kept low for
the duration of the access.
Microprocessor Data Bus. Bidirectional data bus used for read and
write accesses. 3-stated output.
Microprocessor Address Bus. Address bus used to access the inter-
nal registers.
Description
Preliminary Data Sheet
Lucent Technologies Inc.
Lucent Technologies Inc.
October 2000