DSP56303 FREESCALE [Freescale Semiconductor, Inc], DSP56303 Datasheet - Page 214

• Manufacturer Part Number: DSP56303
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Triple Timer Module
9.4.2 Timer Prescaler Load Register (TPLR)
The TPLR is a read/write register that controls the prescaler divide factor (that is, the number that
the prescaler counter loads and begins counting from) and the source for the prescaler input
clock.
9-22
PL11
23
11
— Reserved bit. Read as 0. Write to 0 for future compatibility
PL10
PS1
22
10
Reserved bit. Read as 0. Write with 0 for future compatibility
PCE
TC3
23
23
23
15
23
23
23
7
PS0
PL9
21
9
Figure 9-21. Timer Prescaler Load Register (TPLR)
TC2
14
22
6
Figure 9-20. Timer Module Programming Model
PL20
PL8
20
TCF TOF
TC1 TC0
8
DO
13
21
5
DI
20
12
4
PL19
PL7
DSP56303 User’s Manual, Rev. 2
19
7
DIR
19
11
3
PL18
PL6
18
TCIE
6
18
10
2
TOIE
TRM
PL17
17
9
PL5
1
17
5
INV
TE
0
0
0
0
0
16
8
0
PL16
PL4
16
4
Timer Prescaler Load
Register (TPLR)
TPLR = $FFFF83
Timer Prescaler Count
Register (TPCR)
TPLR = $FFFF82
Timer Control/Status
Register (TCSR)
TCSR0 = $FFFF8F
TCSR1 = $FFFF8B
TCSR2 = $FFFF87
TCPR0 = $FFFF8D
TCPR1 = $FFFF89
TCPR2 = $FFFF85
Timer Load
Register (TLR)
Timer Compare
Register (TCPR)
Timer Count
Register (TCR)
TCR0 = $FFFF8C
TCR1 = $FFFF88
TCR2 = $FFFF84
TLR0 = $FFFF8E
TLR1 = $FFFF8A
TLR2 = $FFFF86
PL15
PL3
15
3
PL14
PL2
14
2
Freescale Semiconductor
PL13
PL1
13
1
PL12
PL0
12
0