DSP56303 FREESCALE [Freescale Semiconductor, Inc], DSP56303 Datasheet - Page 218

• Manufacturer Part Number: DSP56303
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Triple Timer Module
9-26
Bit Number
7–4
3
Table 9-3. Timer Control/Status Register (TCSR) Bit Definitions (Continued)
Bit Name
TC[3–0]
Reset Value
0
0
DSP56303 User’s Manual, Rev. 2
Timer Control
Control the source of the timer clock, the behavior of the TIO signal, and the
Timer mode of operation. Section 9.3, Operating Modes, on page 9-5
describes the timer operating modes in detail. To ensure proper operation,
the TC[3–0] bits should be changed only when the timer is disabled (that is,
when the TCSR[TE] bit is cleared).
Note:
Note:
Reserved. Write to zero for future compatibility.
TC3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Bit Settings
TC2
If the clock is external, the counter is incremented by the transitions
on the TIO signal. The external clock is internally synchronized to
the internal clock, and its frequency should be lower than the
internal operating frequency divided by 4 (that is, CLK/4).
The GPIO function is enabled only if all of the TC[3–0] bits are 0.
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TC1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Number
Description
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Mode Characteristics
Event counter
measurement
measurement
Timer toggle
Input period
Timer pulse
Pulse width
modulation
Input width
Timer and
Watchdog
Watchdog
Function
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Capture
Toggle
Mode
GPIO
event
pulse
Freescale Semiconductor
Outpu
Outpu
Outpu
t
—
Outpu
t
Outpu
t
—
—
—
—
—
GPIO
Input
Input
Input
Input
TIO
1
t
t
Externa
Internal
—
Internal
Internal
—
—
—
—
—
Internal
Internal
Internal
Internal
Internal
Internal
Clock
l