DSP56303 FREESCALE [Freescale Semiconductor, Inc], DSP56303 Datasheet - Page 225

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DSP56303

Manufacturer Part Number
DSP56303
Description
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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; The program words will be stored in contiguous PRAM memory locations
; starting at the specified starting address.
; After reading the program words, program execution starts from the same
; address where loading started.
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0). This will start execution of the loaded program from
; the specified starting address.
;
; The base address of the HI08 in multiplexed mode is 0x80 and is not modified
; by the bootstrap code. All the address lines are enabled and should be
; connected accordingly.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; If MC:MB:MA=111, then it loads the program RAM from the Host
; Interface programmed to operate in the MC68302 bus mode,
; in single-strobe pin configuration.
; The HOST MC68302 bootstrap code expects accesses that are byte wide.
; The HOST MC68302 bootstrap code expects to read 3 bytes forming a 24-bit word
; specifying the number of program words, 3 bytes forming a 24-bit word
; specifying the address to start loading the program words and then 3 bytes
; forming 24-bit words for each program word to be loaded.
; The program words will be stored in contiguous PRAM memory locations
; starting at the specified starting address.
; After reading the program words, program execution starts from the same
; address where loading started.
; The Host Interface bootstrap load program may be stopped by setting the
; Host Flag 0 (HF0). This will start execution of the loaded program from
; the specified starting address.
;
BOOT
AARV
M_SSR
M_STXL
M_SRXL
M_SCCR
M_SCR
M_PCRE
M_AAR1
M_HPCR
M_HSR
M_HRX
HRDF
HF0
HEN
Freescale Semiconductor
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ORG PL: $ff0000,PL:$ff0000; bootstrap code starts at $ff0000
$FFFFC4 ; Host Polarity Control Register
$FFFFC3; Host Status Register
$FFFFC6; Host Receive Register
$0; Host Receive Data Full
$3; Host Flag 0
$6; Host Enable
$D00000
$D00409; AAR1 selects the EPROM as CE~
$FFFF93 ; SCI Status Register
$FFFF95; SCI Transmit Data Register (low)
$FFFF98 ; SCI Receive Data Register (low)
$FFFF9B; SCI Clock Control Register
$FFFF9C; SCI Control Register
$FFFF9F
$FFFFF8
; mapped as P from $D00000 to
; EPROM would be located
; $DFFFFF, active low
; where the external byte-wide
; Port E Control register
; this is the location in P memory
; on the external memory bus
; Address Attribute Register 1
DSP56303 User’s Manual, Rev. 2
Bootstrap Code
A-3

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