MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 168
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 6 Background Debug Module (BDMV4) Block Description
6.3
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Detailed descriptions of the registers and associated bits are given in the subsections that follow.
6.3.1
168
Memory Map and Register Definition
Register
Address
0xFF02–
0xFF08–
0xFF0B
0xFF00
0xFF01
0xFF05
0xFF06
0xFF07
Module Memory Map
Reserved
BDM Status Register (BDMSTS)
Reserved
BDM CCR Holding Register (BDMCCR)
BDM Internal Register Position (BDMINR)
Reserved
Table 6-1. INT Memory Map
MC9S12Q128
Rev 1.09
Use
Figure
6-2. Registers are accessed by
Freescale Semiconductor
Access
R/W
R/W
—
—
—
R
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