MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 361
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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12.3.2.11 Reserved Registers (PWMSCNTx)
The registers PWMSCNTA and PWMSCNTB are reserved for factory testing of the PWM module and
are not available in normal modes.
Read: always read 0x0000 in normal modes
Write: unimplemented in normal modes
12.3.2.12 PWM Channel Counter Registers (PWMCNTx)
Each channel has a dedicated 8-bit up/down counter which runs at the rate of the selected clock source.
The counter can be read at any time without affecting the count or the operation of the PWM channel. In
left aligned output mode, the counter counts from 0 to the value in the period register – 1. In center aligned
output mode, the counter counts from 0 up to the value in the period register and then back down to 0.
Any value written to the counter causes the counter to reset to 0x0000, the counter direction to be set to
up, the immediate load of both duty and period registers with values from the buffers, and the output to
change according to the polarity bit. The counter is also cleared at the end of the effective period (see
Section 12.4.2.5, “Left Aligned Outputs,”
details). When the channel is disabled (PWMEx = 0), the PWMCNTx register does not count. When a
channel becomes enabled (PWMEx = 1), the associated PWM counter starts at the count in the
PWMCNTx register. For more detailed information on the operation of the counters, reference
Section 12.4.2.4, “PWM Timer Counters.”
Freescale Semiconductor
Module Base + 0x000A
Module Base + 0x000B
Reset
Reset
W
W
R
R
0
0
0
0
7
7
Writing to these registers when in special modes can alter the PWM
functionality.
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 12-13. Reserved Register (PWMSCNTA)
Figure 12-14. Reserved Register (PWMSCNTB)
0
0
0
0
5
5
and
Section 12.4.2.6, “Center Aligned Outputs,”
MC9S12Q128
Rev 1.09
NOTE
0
0
0
0
4
4
Chapter 12 Pulse-Width Modulator (PWM8B4C) Block Description
0
0
0
0
3
3
0
0
0
0
2
2
0
0
0
0
1
1
for more
0
0
0
0
0
0
361
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