MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 196
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 7 Debug Module (DBGV1) Block Description
7.3
A summary of the registers associated with the DBG sub-block is shown in
descriptions of the registers and bits are given in the subsections that follow.
7.3.1
7.3.2
This section consists of the DBG register descriptions in address order. Most of the register bits can be
written to in either BKP or DBG mode, although they may not have any effect in one of the modes.
However, the only bits in the DBG module that can be written while the debugger is armed (ARM = 1) are
DBGEN and ARM
196
Name
DBGSC
DBGC1
0x0020
0x0021
Memory Map and Register Definition
Address
(1)
0x002A
0x002B
0x002C
0x002D
0x002E
0x0020
0x0021
0x0022
0x0023
0x0024
0x0025
0x0026
0x0027
0x0028
0x0029
0x002F
Offset
Module Memory Map
Register Descriptions
W
W
R
R
Debug Control Register (DBGC1)
Debug Status and Control Register (DBGSC)
Debug Trace Buffer Register High (DBGTBH)
Debug Trace Buffer Register Low (DBGTBL)
Debug Control Register 2 (DBGC2) / (BKPCT0)
Debug Control Register 3 (DBGC3) / (BKPCT1)
Debug Comparator A Extended Register (DBGCAX) / (/BKP0X)
Debug Comparator A Register High (DBGCAH) / (BKP0H)
Debug Comparator A Register Low (DBGCAL) / (BKP0L)
Debug Comparator B Extended Register (DBGCBX) / (BKP1X)
Debug Comparator B Register High (DBGCBH) / (BKP1H)
Debug Comparator B Register Low (DBGCBL) / (BKP1L)
Debug Count Register (DBGCNT)
Debug Comparator C Extended Register (DBGCCX)
Debug Comparator C Register High (DBGCCH)
Debug Comparator C Register Low (DBGCCL)
DBGEN
Bit 7
AF
= Unimplemented or Reserved
Figure 7-3. DBG Register Summary
ARM
BF
6
Table 7-2. DBGV1 Memory Map
TRGSEL
CF
MC9S12Q128
5
Rev 1.09
Use
BEGIN
4
0
DBGBRK
3
Figure
2
0
TRG
7-3. Detailed
Freescale Semiconductor
Access
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CAPMOD
R
R
R
Bit 0
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