MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 354
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 12 Pulse-Width Modulator (PWM8B4C) Block Description
12.3.2.3
Each PWM channel has a choice of two clocks to use as the clock source for that channel as described
below.
Read: anytime
Write: anytime
354
Module Base + 0x0002
PCLK3
PCLK2
PCLK1
PCLK0
Reset
Field
3
2
1
0
W
R
Pulse Width Channel 3 Clock Select
0 Clock B is the clock source for PWM channel 3.
1 Clock SB is the clock source for PWM channel 3.
Pulse Width Channel 2 Clock Select
0 Clock B is the clock source for PWM channel 2.
1 Clock SB is the clock source for PWM channel 2.
Pulse Width Channel 1 Clock Select
0 Clock A is the clock source for PWM channel 1.
1 Clock SA is the clock source for PWM channel 1.
Pulse Width Channel 0 Clock Select
0 Clock A is the clock source for PWM channel 0.
1 Clock SA is the clock source for PWM channel 0.
PWM Clock Select Register (PWMCLK)
0
0
7
Register bits PCLK0 to PCLK3 can be written anytime. If a clock select is
changed while a PWM signal is being generated, a truncated or stretched
pulse can occur during the transition.
= Unimplemented or Reserved
0
0
6
Figure 12-5. PWM Clock Select Register (PWMCLK)
Table 12-3. PWMCLK Field Descriptions
0
5
MC9S12Q128
Rev 1.09
NOTE
0
4
Description
PCLK3
0
3
PCLK2
0
2
PCLK1
Freescale Semiconductor
0
1
PCLK0
0
0
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