MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 232
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.4
This register controls the conversion sequence length, FIFO for results registers and behavior in Freeze
Mode. Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
232
Module Base + 0x0003
S8C, S4C,
S2C, S1C
ASCIE
Reset
ASCIF
Field
Field
6–3
1
0
W
R
ATD Sequence Complete Interrupt Enable
0 ATD Sequence Complete interrupt requests are disabled.
1 ATD Interrupt will be requested whenever ASCIF = 1 is set.
ATD Sequence Complete Interrupt Flag — If ASCIE = 1 the ASCIF flag equals the SCF flag (see
Section 8.3.2.7, “ATD Status Register 0
0 No ATD interrupt occurred
1 ATD sequence complete interrupt pending
Conversion Sequence Length — These bits control the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
ATD Control Register 3 (ATDCTL3)
0
0
7
= Unimplemented or Reserved
S8C
ETRIGLE
0
6
Table 8-1. ATDCTL2 Field Descriptions (continued)
0
0
1
1
Figure 8-6. ATD Control Register 3 (ATDCTL3)
Table 8-2. External Trigger Configurations
Table 8-3. ATDCTL3 Field Descriptions
S4C
ETRIGP
1
5
0
1
0
1
(ATDSTAT0)”), else ASCIF reads zero. Writes have no effect.
MC9S12Q128
S2C
Rev 1.09
0
4
External Trigger Sensitivity
Description
Description
Falling edge
Rising edge
High level
Low level
S1C
0
3
FIFO
0
2
Freescale Semiconductor
FRZ1
0
1
Table 8-4
FRZ0
0
0
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