MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 437
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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15.3.2.2
Read: Anytime but will always return 0x0000 (1 state is transient)
Write: Anytime
15.3.2.3
Read: Anytime
Write: Anytime
Freescale Semiconductor
Module Base + 0x0001
Module Base + 0x0002
OC7M[7:2]
FOC[7:2]
Reset
Reset
Field
Field
7:2
7:2
W
W
R
R
OC7M7
FOC7
Force Output Compare Action for Channel 7:2— A write to this register with the corresponding data bit(s) set
causes the action which is programmed for output compare “x” to occur immediately. The action taken is the
same as if a successful comparison had just taken place with the TCx register except the interrupt flag does not
get set.
Note: A successful channel 7 output compare overrides any channel 6:2 compares. If forced output compare on
Output Compare 7 Mask — Setting the OC7Mx (x ranges from 2 to 6) will set the corresponding port to be an
output port when the corresponding TIOSx (x ranges from 2 to 6) bit is set to be an output compare.
Note: A successful channel 7 output compare overrides any channel 6:2 compares. For each OC7M bit that is
Timer Compare Force Register (CFORC)
Output Compare 7 Mask Register (OC7M)
0
0
0
7
7
any channel occurs at the same time as the successful output compare then forced output compare action
will take precedence and interrupt flag won’t get set.
set, the output compare action reflects the corresponding OC7D bit.
OC7M6
FOC6
0
0
0
Figure 15-8. Output Compare 7 Mask Register (OC7M)
6
6
Figure 15-7. Timer Compare Force Register (CFORC)
Table 15-2. CFORC Field Descriptions
Table 15-3. OC7M Field Descriptions
OC7M5
FOC5
0
0
0
5
5
MC9S12Q128
OC7M4
FOC4
Rev 1.09
0
0
0
4
4
Description
Description
OC7M3
FOC3
Chapter 15 Timer Module (TIM16B6C) Block Description
0
0
0
3
3
OC7M2
FOC2
0
0
0
2
2
0
0
0
1
1
0
0
0
0
0
437
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