MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 80
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 2 Port Integration Module (PIM9C32) Block Description
2.3.2.1
2.3.2.1.1
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
If a TIM-channel is defined as output, the related port T is assigned to IOC function.
In addition to the possible timer functionality of port T pins PWM channels can be routed to port T. For
this the Module Routing Register (MODRR) needs to be configured.
80
Module Base + 0x0000
Reset
PWM
TIM
W
R
PTT7
IOC7
Port T Registers
0
7
Port T I/O Register (PTT)
1. All fields in the that are not shaded are standard use cases.
2. TIMEN[x] means that the timer is enabled (TSCR1[7]), the related channel is
= Unimplemented or Reserved
MODRR[x]
configured for output compare function (TIOS[x] or special output on a timer
overflow event — configurable in TTOV[x]) and the timer output is routed to the
port pin (TCTL1/TCTL2).
PTT6
IOC6
Table 2-3. Port T[4:0] Pin Functionality Configurations
0
0
0
0
1
1
1
1
0
6
Figure 2-3. Port T I/O Register (PTT)
PWME[x]
PTT5
IOC5
0
5
0
0
1
1
0
0
1
1
MC9S12Q128
PTT4
IOC4
TIMEN[x]
Rev 1.09
0
4
(2)
0
1
0
1
0
1
0
1
PWM3
PTT3
IOC3
0
3
General Purpose I/O
General Purpose I/O
General Purpose I/O
Port T[x] Output
Timer
Timer
Timer
PWM
PWM
PWM2
PTT2
IOC2
0
2
(1)
Freescale Semiconductor
PWM1
PTT1
0
1
PWM0
PTT0
0
0
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