MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 222

• Manufacturer Part Number: MC9S12Q
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Chapter 7 Debug Module (DBGV1) Block Description
7.4.3.2
A breakpoint request to the CPU can be created if BKCEN in DBGC2 is set. Breakpoints based on a
successful comparator C match can be accomplished regardless of the mode of operation for comparator
A or B, and do not affect the status of the ARM bit. TAGC in DBGC2 is used to select either tagged or
forced breakpoint requests for comparator C. Breakpoints based on comparator C are disabled in LOOP1
mode.
7.5
The DBG module is disabled after reset.
The DBG module cannot cause a MCU reset.
7.6
The DBG contains one interrupt source. If a breakpoint is requested and BDM in DBGC2 is cleared, an
SWI interrupt will be generated.
222
BEGIN
Resets
Interrupts
0
0
0
0
1
1
1
1
Breakpoint Based on Comparator C
Because breakpoints cannot be disabled when the DBG is armed, one must
be careful to avoid an “infinite breakpoint loop” when using tagged-type C
breakpoints while the DBG is armed. If BDM breakpoints are selected,
executing a TRACE1 instruction before the GO instruction is the
recommended way to avoid re-triggering a breakpoint if one does not wish
to de-arm the DBG. If SWI breakpoints are selected, disarming the DBG in
the SWI interrupt service routine is the recommended way to avoid re-
triggering a breakpoint.
TRGSEL
0
0
1
1
0
0
1
1
DBGBRK
Table 7-26. Breakpoint Setup
0
1
0
1
0
1
0
1
MC9S12Q128
Fill trace buffer until trigger address
(no CPU breakpoint — keep running)
Fill trace buffer until trigger address, then a forced breakpoint
request occurs
Fill trace buffer until trigger opcode is about to execute
(no CPU breakpoint — keep running)
Fill trace buffer until trigger opcode about to execute, then a
tagged breakpoint request occurs
Start trace buffer at trigger address
(no CPU breakpoint — keep running)
Start trace buffer at trigger address, a forced breakpoint
request occurs when trace buffer is full
Start trace buffer at trigger opcode
(no CPU breakpoint — keep running)
Start trace buffer at trigger opcode, a forced breakpoint request
occurs when trace buffer is full
Rev 1.09
NOTE
Type of Debug Run
Freescale Semiconductor