MC9S12Q FREESCALE [Freescale Semiconductor, Inc], MC9S12Q Datasheet - Page 382
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MC9S12Q
Manufacturer Part Number
MC9S12Q
Description
Microcontrollers
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC9S12Q.pdf
(644 pages)
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Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
13.3
This section provides a detailed description of all memory and registers.
13.3.1
The memory map for the SCI module is given below in
is the address offset. The total address for each register is the sum of the base address for the SCI module
and the address offset for each register.
13.3.2
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Writes to a reserved register location do not have any effect and
reads of these locations return a zero. Details of register bit and field function follow the register diagrams,
in bit order.
382
Address
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
Memory Map and Registers
Module Memory Map
Register Descriptions
SCIDRH
SCIBDH
SCIBDL
SCICR1
SCICR2
SCISR1
SCISR2
SCIDRL
Name
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
LOOPS
TDRE
SBR7
Bit 7
TIE
R8
R7
T7
0
0
Figure 13-2. SCI Register Summary
= Unimplemented or Reserved
SCISWAI
SBR6
TCIE
TC
R6
T8
T6
6
0
0
MC9S12Q128
RSRC
RDRF
Rev 1.09
SBR5
RIE
R5
T5
5
0
0
0
Figure
SBR12
SBR4
IDLE
ILIE
R4
T4
M
4
0
0
13-2. The Address listed for each register
SBR11
WAKE
SBR3
OR
TE
R3
T3
3
0
0
SBR10
BRK13
SBR2
ILT
RE
NF
R2
T2
2
0
Freescale Semiconductor
TXDIR
SBR9
SBR1
RWU
PE
FE
R1
T1
1
0
SBR8
SBR0
Bit 0
SBK
RAF
PT
PF
R0
T0
0
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