HD6432621 Hitachi, HD6432621 Datasheet - Page 106

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

2.8.2
When the RES input goes low all current processing stops and the CPU enters the reset state. All
interrupts are masked in the reset state. Reset exception handling starts when the RES signal
changes from low to high.
The reset state can also be entered by a watchdog timer overflow. For details, refer to section 12,
Watchdog Timer.
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Notes: *1
*2
*3
From any state except hardware standby mode, a transition to the reset state occurs whenever RES
goes low. A transition can also be made to the reset state when the watchdog timer overflows.
From any state, a transition to hardware standby mode occurs when STBY goes low.
Apart from these states, there are also the watch mode, subactive mode, and the subsleep mode in the
H8S/2626 Series. See section 21B, Power-Down Modes [H8S/2626 Series].
Reset State
Exception handling state
Bus-released state
Reset state *
Reset state
RES= High
1
Figure 2-15 State Transitions
External interrupt request
Program execution state
End of bus request
Bus request
STBY= High, RES= Low
Hardware standby mode*
Software standby mode
Power-down state*
Sleep mode
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2