HD6432621 Hitachi, HD6432621 Datasheet - Page 692
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HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
(1069 pages)
- Current page: 692 of 1069
- Download datasheet (5Mb)
19.8.2
Software protection can be implemented by setting the SWE1 bit in FLMCR1, erase block register
1 (EBR1), erase block register 2 (EBR2), and the RAMS bit in the RAM emulation register
(RAMER). When software protection is in effect, setting the P1 or E1 bit in flash memory control
register 1 (FLMCR1), does not cause a transition to program mode or erase mode. (See table
19-9.)
Table 19-9 Software Protection
Item
SWE bit protection
Block specification
protection
Emulation protection
648
Software Protection
Description
Setting bit SWE1 in FLMCR1 to 0 will
place area H'000000 to H'03FFFFF in the
program/erase-protected state. (Execute
the program in the on-chip RAM, external
memory)
Erase protection can be set for individual
blocks by settings in erase block register 1
(EBR1) and erase block register 2 (EBR2).
Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all
blocks in the program/erase-protected
state.
Program
Yes
—
Yes
Functions
Erase
Yes
Yes
Yes
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