HD6432621 Hitachi, HD6432621 Datasheet - Page 670
HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
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Bit 0—Program 1 (P1): Selects program mode transition or clearing. Do not set the SWE1,
PSU1, ESU1, EV1, PV1, or E1 bit at the same time.
Bit 0: P1
0
1
19.5.2
FLMCR2 is an 8-bit register used for flash memory operating mode control. FLMCR2 is
initialized to H'00 by a reset, and in hardware standby mode and software standby mode. When
on-chip flash memory is disabled, a read will return H'00.
Note: FLMCR2 is a read-only register, and should not be written to.
Bit 7—Flash Memory Error (FLER): Indicates that an error has occurred during an operation on
flash memory (programming or erasing). When FLER is set to 1, flash memory goes to the error-
protection state.
Bit 7: FLER
0
1
Bits 6 to 0—Reserved: These bits always read 0.
626
Initial value:
Flash Memory Control Register 2 (FLMCR2)
Description
Program mode cleared
Transition to program mode
[Setting condition]
When FWE = 1, SWE1 = 1, and PSU1 = 1
R/W:
Bit:
Description
Flash memory is operating normally
Flash memory program/erase protection (error protection) is disabled
[Clearing condition]
Reset or hardware standby mode
An error has occurred during flash memory programming/erasing
Flash memory program/erase protection (error protection) is enabled
[Setting condition]
See section 19.8.3, Error Protection
FLER
7
0
R
—
—
6
0
—
—
5
0
—
—
4
0
—
—
3
0
—
—
2
0
—
—
1
0
(Initial value)
(Initial value)
—
—
0
0
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