HD6432621 Hitachi, HD6432621 Datasheet - Page 933

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

ISR—IRQ Status Register
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
R/(W)*
—
7
0
IRQ5 to IRQ0 interrupt request status indication
0
1
R/(W)*
—
6
0
[Clearing conditions]
• Cleared by reading IRQnF flag when IRQnF = 1, then writing 0
• When interrupt exception handling is executed when low-level
• When IRQn interrupt exception handling is executed when
• When the DTC is activated by an IRQn interrupt, and the DISEL
[Setting conditions]
• When IRQn input goes low when low-level detection is set
• When a falling edge occurs in IRQn input when falling edge
• When a rising edge occurs in IRQn input when rising edge
• When a falling or rising edge occurs in IRQn input when both-
to IRQnF flag
detection is set (IRQnSCB = IRQnSCA = 0) and IRQn input is
high
falling, rising, or both-edge detection is set (IRQnSCB = 1 or
IRQnSCA = 1)
bit in MRB of the DTC is cleared to 0
(IRQnSCB = IRQnSCA = 0)
detection is set (IRQnSCB = 0, IRQnSCA = 1)
detection is set (IRQnSCB = 1, IRQnSCA = 0)
edge detection is set (IRQnSCB = IRQnSCA = 1)
R/(W)*
IRQ5F
5
0
R/(W)*
IRQ4F
4
0
H'FE15
R/(W)*
IRQ3F
3
0
R/(W)*
IRQ2F
2
0
Interrupt Controller
R/(W)*
IRQ1F
1
0
(n = 5 to 0)
R/(W)*
IRQ0F
0
0
889