HD6432621 Hitachi, HD6432621 Datasheet - Page 674

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Bit 7—Power-Down Disable (PDWND): Enables or disables a transition to the flash memory
power-down mode when the LSI switches to subactive mode.
Bit 7: PDWND Description
0
1
Bits 6 to 0—Reserved: These bits always read 0.
19.5.7
SCRX is an 8-bit readable/writable register that controls on-chip flash memory.
SCRX is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 4—Reserved: Only 0 may be written to these bits.
Bit 3—Flash Memory Control Register Enable (FLSHE): Controls CPU access to the flash
memory control registers (FLMCR1, FLMCR2, EBR1, and EBR2). Setting the FLSHE bit to 1
enables read/write access to the flash memory control registers. If FLSHE is cleared to 0, the flash
memory control registers are deselected. In this case, the flash memory control register contents
are retained.
Bit 3: FLSHE
0
1
Bits 2 to 0—Reserved: Only 0 may be written to these bits.
630
Bit
Initial value
R/W
Serial Control Register X (SCRX)
Transition to flash memory power-down mode enabled
Transition to flash memory power-down mode disabled
Description
Flash control registers deselected in area H'FFFFA8 to H'FFFFAC (Initial value)
Flash control registers selected in area H'FFFFA8 to H'FFFFAC
R/W
7
0
R/W
6
0
R/W
5
0
R/W
4
0
FLSHE
R/W
3
0
R/W
2
0
R/W
1
0
(Initial value)
R/W
0
0

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