HD6432621 Hitachi, HD6432621 Datasheet - Page 459
HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
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12.5.2
If bits PSS and CKS2 to CKS0 in TCSR are written to while the WDT is operating, errors could
occur in the incrementation. Software must stop the watchdog timer (by clearing the TME bit to 0)
before changing the value of bits PSS and CKS2 to CKS0.
12.5.3
If the mode is switched from watchdog timer to interval timer, or vice versa, while the WDT is
operating, errors could occur in the incrementation. Software must stop the watchdog timer (by
clearing the TME bit to 0) before switching the mode.
12.5.4
If the WDTOVF output signal is input to the RES pin of the H8S/2626 Series or H8S/2623 Series,
the chip will not be initialized correctly. Make sure that the WDTOVF signal is not input logically
to the RES pin. To reset the entire system by means of the WDTOVF signal, use the circuit shown
in figure 12-9.
12.5.5
The H8S/2626 Series or H8S/2623 Series is not reset internally if TCNT overflows while the
RSTE bit is cleared to 0 during watchdog timer operation, but TCNT and TCSR of the WDT are
reset.
TCNT, TCSR, and RSTCSR cannot be written to while the WDTOVF signal is low. Also note
that a read of the WOVF flag is not recognized during this period. To clear the WOVF falg,
therefore, read TCSR after the WDTOVF signal goes high, then write 0 to the WOVF flag.
Reset signal to entire system
Changing Value of PSS and CKS2 to CKS0
Switching between Watchdog Timer Mode and Interval Timer Mode
System Reset by WDTOVF Signal
Internal Reset in Watchdog Timer Mode
Figure 12-9 Circuit for System Reset by WDTOVF Signal (Example)
Reset input
H8S/2626 Series or
H8S/2623 Series
WDTOVF
RES
415
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