HD6432621 Hitachi, HD6432621 Datasheet - Page 588

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

15.2.15 Transmit Error Counter (TEC)
The transmit error counter (TEC) is an 8-bit read-only register that functions as a counter
indicating the number of transmit message errors on the CAN bus. The count value is stipulated in
the CAN protocol.
15.2.16 Unread Message Status Register (UMSR)
The unread message status register (UMSR) is a 16-bit readable/writable register containing status
flags that indicate, for individual mailboxes (buffers), that a received message has been
overwritten by a new receive message before being read. When a message is overwritten by a new
receive message, the old data is lost.
Note: * Can only be written with 1 for flag clearing.
Bits 15 to 0—Unread Message Status Flags (UMSR7 to UMSR0, UMSR15 to UMSR8):
Status flags indicating that an unread receive message has been overwritten.
544
Initial value:
Initial value:
Initial value:
TEC
UMSR
R/W:
R/W:
R/W:
Bit:
Bit:
Bit:
UMSR15 UMSR14 UMSR13 UMSR12 UMSR11 UMSR10
UMSR7
R/(W) *
R/(W) *
15
7
0
R
0
7
0
UMSR6
R/(W) *
R/(W) *
14
6
0
R
0
6
0
UMSR5
R/(W) *
R/(W) *
13
5
0
R
0
5
0
UMSR4
R/(W) *
R/(W) *
12
4
0
R
0
4
0
UMSR3
R/(W) *
R/(W) *
11
3
0
R
0
3
0
UMSR2
R/(W) *
R/(W) *
10
2
0
R
0
2
0
UMSR1
R/(W) *
UMSR9
R/(W) *
1
0
R
9
0
1
0
UMSR0
R/(W) *
UMSR8
R/(W) *
0
0
R
8
0
0
0