XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 101

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

MC68HC(7)08KH12
MOTOROLA
$003A
$003B
$003C
$003D
$003E
$003F
NOTES:
1. When AUTO = 0, PLLIE is forced clear and is read-only.
2. When AUTO = 0, PLLF and LOCK read as clear.
3. When AUTO = 1, ACQ is read-only.
4. When PLLON = 0 or VRS7:VRS0 = $0, BCS is forced clear and is read-only.
5. When PLLON = 1, the PLL programming register is read-only.
6. When BCS = 1, PLLON is forced set and is read-only.
Addr.
PLL Bandwidth Control
PLL Reference Divider
PLL Control Register
PLL Multiplier Select
PLL Multiplier Select
Register Name
Unimplemented
Select Register
—
Register High
Register Low
Rev. 1.0
Register
(PBWC)
(PMSH)
(PRDS)
(PMSL)
(PCTL)
Table 8-2. CGM I/O Register Summary
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Clock Generator Module (CGM)
PLLIE
AUTO
MUL7
Bit 7
0
0
0
0
0
0
0
= Unimplemented
LOCK
MUL6
PLLF
6
0
0
0
0
0
0
0
PLLON
MUL5
ACQ
5
1
0
0
0
0
0
0
MUL4
BCS
4
0
0
0
0
0
0
0
0
MUL11
PRE1
MUL3
RDS3
Clock Generator Module (CGM)
3
1
0
0
0
0
0
MUL10
PRE2
MUL2
RDS2
2
0
0
0
0
0
0
Advance Information
MUL9
MUL1
RDS1
CGM Registers
1
0
0
0
0
0
1
0
MUL8
MUL0
RDS0
Bit 0
0
0
0
0
0
0
1
101