XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 104

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Clock Generator Module (CGM)
8.6.2 PLL Bandwidth Control Register (PBWC)
Advance Information
104
Address:
The PLL bandwidth control register:
AUTO — Automatic Bandwidth Control Bit
LOCK — Lock Indicator Bit
Reset:
Read:
Write:
•
•
This read/write bit selects automatic or manual bandwidth control.
Since this CGM is optimized a frequency output of 48MHz for the USB
module, automatic control should be set. Reset clears the AUTO bit.
When the AUTO bit is set, LOCK is a read-only bit that becomes set
when the VCO clock, CGMVCLK, is locked (running at the
programmed frequency). When the AUTO bit is clear, LOCK reads as
1 = Automatic bandwidth control (recommended)
0 = Manual bandwidth control
Indicates when the PLL is locked
In automatic bandwidth control mode, indicates when the PLL is in
acquisition or tracking mode
Figure 8-4. PLL Bandwidth Control Register (PBWC)
$003B
AUTO
Bit 7
PRE1
0
Clock Generator Module (CGM)
0
0
1
1
LOCK
= Unimplemented
Table 8-3. PRE[1:0] Programming
6
0
PRE0
0
1
0
1
ACQ
5
0
P
0
1
2
3
4
0
0
Prescaler Multiplier
3
0
0
MC68HC(7)08KH12
1
2
4
8
2
0
0
1
0
0
MOTOROLA
—
Rev. 1.0
Bit 0
0
0