XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 217

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

14.5 IRQ Module During Break Interrupts
14.6 IRQ Status and Control Register (ISCR)
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Address:
The system integration module (SIM) controls whether the IRQ1 latch
can be cleared during the break state. The BCFE bit in the break flag
control register (BFCR) enables software to clear the latches during the
break state.
To allow software to clear the IRQ1 latch during a break interrupt, write
a logic one to the BCFE bit. If a latch is cleared during the break state, it
remains cleared when the MCU exits the break state.
To protect the latches during the break state, write a logic zero to the
BCFE bit. With BCFE at logic zero (its default state), writing to the ACK1
bit in the IRQ status and control register during the break state has no
effect on the IRQ latch.
The IRQ Status and Control Register (ISCR) controls and monitors
operation of the IRQ module. The ISCR has the following functions:
Reset:
Read:
Write:
•
•
•
•
Shows the state of the IRQ1 flag
Clears the IRQ1 latch
Masks IRQ1 and interrupt request
Controls triggering sensitivity of the IRQ1/V
Figure 14-2. IRQ Status and Control Register (ISCR)
$001E
Bit 7
0
0
(See Section 7. System Integration Module
External Interrupt (IRQ)
= Unimplemented
6
0
0
5
0
0
4
0
0
IRQF1
IRQ Module During Break Interrupts
3
0
ACK1
PP
2
0
0
External Interrupt (IRQ)
interrupt pin
Advance Information
IMASK1
1
0
(SIM).)
MODE1
Bit 0
0
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