XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 71
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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7.5 SIM Counter
7.5.1 SIM Counter During Power-On Reset
7.5.2 SIM Counter During Stop Mode Recovery
7.5.3 SIM Counter and Reset States
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
The SIM counter is used by the power-on reset module (POR) and in
stop mode recovery to allow the oscillator time to stabilize before
enabling the internal bus (IBUS) clocks. The SIM counter also serves as
a prescalar for the computer operating properly module (COP). The SIM
counter uses 12 stages for counting, followed by a 13th stage that
triggers a reset of SIM counters and supplies the clock for the COP
module. The SIM counter is clocked by the falling edge of CGMXCLK.
The power-on reset module (POR) detects power applied to the MCU.
At power-on, the POR circuit asserts the signal PORRST. Once the SIM
is initialized, it enables the oscillator to drive the bus clock state machine.
The SIM counter also is used for stop mode recovery. The STOP
instruction clears the SIM counter. After an interrupt, break, or reset, the
SIM senses the state of the short stop recovery bit, SSREC, in the mask
option register. If the SSREC bit is a logic one, then the stop recovery is
reduced from the normal delay of 4096 CGMXCLK cycles down to 32
CGMXCLK cycles. This is ideal for applications using canned oscillators
that do not require long start-up times from stop mode. External crystal
applications should use the full stop recovery time, that is, with SSREC
cleared in the configuration register (CONFIG).
External reset has no effect on the SIM counter.
for details.) The SIM counter is free-running after all reset states.
7.4.2 Active Resets from Internal Sources
internal reset recovery sequences.)
System Integration Module (SIM)
System Integration Module (SIM)
for counter control and
(See 7.7.2 Stop Mode
Advance Information
SIM Counter
(See
71
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