XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 67

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

7.4.1 External Pin Reset
7.4.2 Active Resets from Internal Sources
MC68HC(7)08KH12
MOTOROLA
CGMOUT
RST
IAB
—
PC
Rev. 1.0
An internal reset clears the SIM counter
external reset does not. Each of the resets sets a corresponding bit in
the reset status register (RSR).
The RST pin circuits include an internal pullup device. Pulling the
asynchronous RST pin low halts all processing. The PIN bit of the reset
status register (RSR) is set as long as RST is held low for a minimum of
67 CGMXCLK cycles, assuming that the POR was not the source of the
reset. See
All internal reset sources actively pull the RST pin low for 32 CGMXCLK
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles.
5. An internal reset can be caused by an illegal address, illegal opcode,
COP timeout, or POR.
Note that for POR resets, the SIM cycles through 4096 CGMXCLK
cycles during which the SIM forces the RST pin low. The internal reset
signal then follows the sequence from the falling edge of RST shown in
Figure
Reset Type
Figure 7-4. External Reset Timing
All others
7-5.
POR
System Integration Module (SIM)
Table 7-2
Table 7-2. PIN Bit Set Timing
for details.
(See Figure 7-6. Sources of Internal
Number of Cycles Required to Set PIN
(See 7.8 SIM
Figure 7-4
VECT H
4163 (4096 + 64 + 3)
(see 7.5 SIM
VECT L
67 (64 + 3)
System Integration Module (SIM)
shows the relative timing.
Reset and System Initialization
Registers.)
Counter), but an
Advance Information
See Figure 7-
Reset.)
67