XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 144
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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Universal Serial Bus Module (USB)
9.5.6 USB Embedded Device Status Register (DSR)
Advance Information
144
Address:
TX1E — Embedded Device Endpoint 1/2 Transmit Enable
TP1SIZ3-TP1SIZ0 — Embedded Device Endpoint 1/2 Transmit Data
Reset:
Read: DRSEQ
Write:
This read/write bit enables a transmit to occur when the USB Host
controller sends an IN token to Endpoint 1 or Endpoint 2 of the
embedded device. The appropriate endpoint enable bit, ENABLE1 or
ENABLE2 bit in the DCR2 register, should also be set. Software
should set the TX1E bit when data is ready to be transmitted. It must
be cleared by software when no more data needs to be transmitted.
If this bit is 0 or the TXD1F is set, the USB will respond with a NAK
handshake to any Endpoint 1 or Endpoint 2 directed IN tokens. Reset
clears this bit.
These read/write bits store the number of transmit data bytes for the
next IN token request for embedded device Endpoint 1 or Endpoint 2.
These bits are cleared by reset.
Figure 9-17. USB Embedded Device Status Register (DSR)
1 = The data buffers are used for embedded device Endpoint 2
0 = The data buffers are used for embedded device Endpoint 1
1 = Data is ready to be sent.
0 = Data is not ready. Respond with NAK.
$004D
Bit 7
Universal Serial Bus Module (USB)
X
DSETUP
= Unimplemented
6
X
Packet Size
DTX1ST
5
0
DTX1STR
4
0
0
X = Indeterminate
RP0SIZ3 RPS0IZ2 RP0SIZ1 RP0SIZ0
3
X
MC68HC(7)08KH12
2
X
X
1
MOTOROLA
—
Rev. 1.0
Bit 0
X
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