XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 197
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
(262 pages)
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MC68HC(7)08KH12
MOTOROLA
NOTE:
—
Rev. 1.0
Address:
DDRE[4:0] — Data Direction Register E Bits
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
Figure 12-15
When bit DDREx is a logic one, reading address $0008 reads the PTEx
data latch. When bit DDREx is a logic zero, reading address $0008
reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port E pins.
Reset:
Read:
Write:
These read/write bits control port E data direction. Reset clears
DDRE[4:0], configuring all port E pins as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
READ DDRE ($000A)
WRITE DDRE ($000A)
WRITE PTE ($0008)
READ PTE ($0008)
$000A
Bit 7
Figure 12-14. Data Direction Register E (DDRE)
0
0
shows the port E I/O logic.
= Unimplemented
6
0
0
Figure 12-15. Port E I/O Circuit
I/O Ports
RESET
5
0
0
DDRE4
DDREx
PTEx
4
0
DDRE3
3
0
Table 12-4
DDRE2
2
0
Advance Information
DDRE1
summarizes
1
0
I/O Ports
DDRE0
Bit 0
Port E
0
PTEx
197
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