XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 225
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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15.4.3 Port-D Keyboard Interrupt Registers
15.4.3.1 Port-D Keyboard Status and Control Register:
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Figure 15-2. Port-D Keyboard Status and Control Register (KBDSCR)
Address: $000C
An interrupt signal on an edge-triggered pin can be acknowledged
immediately after enabling the pin. An interrupt signal on an edge- and
level-triggered interrupt pin must be acknowledged after a delay that
depends on the external load.
Another way to avoid a false interrupt for port-D:
Bits [7:4] — Not used
Reset:
Read:
Write:
3. Write to the ACKD bit in the keyboard status and control register
4. Clear the IMASKD bit.
1. Configure the keyboard pins as outputs by setting the appropriate
2. Write logic 1s to the appropriate port-D data register bits.
3. Enable the KBDI pins by setting the appropriate KBDIEx bits in the
•
•
•
•
These read-only bits always read as logic 0s.
to clear any false interrupts.
DDRD bits in data direction register D.
keyboard interrupt enable register.
Flags keyboard interrupt requests.
Acknowledges keyboard interrupt requests.
Masks keyboard interrupt requests.
Controls keyboard interrupt triggering sensitivity.
Bit 7
0
0
Keyboard Interrupt Module (KBI)
= Unimplemented
6
0
0
5
0
0
4
0
0
Port-D Keyboard Interrupt Block Diagram
KEYDF
3
0
Keyboard Interrupt Module (KBI)
ACKD
2
0
0
Advance Information
IMASKD
1
0
MODED
Bit 0
0
225
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