XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 125
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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9.4.4 USB SIE Timing Status Register (SIETSR)
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Address:
SOFIE — Start Of Frame Interrupt Enable
EOF2IE — The Second End of Frame Point Interrupt Enable
EOPIE — End of Packet Detect Interrupt Enable
TRANIE — Bus Signal Transition Detect Interrupt Enable
Reset:
Read:
Write:
This read/write bit enables the Start Of Frame to generate a USB
interrupt when the SOFF bit becomes set. Reset clears this bit.
This read/write bit enables the Second End Of Frame to generate a
USB interrupt when the EOF2F bit becomes set. Reset clears this bit.
This read/write bit enables the USB to generate a interrupt request
when the EOPF bit becomes set. Reset clears the bit.
This read/write bit enables the Signal Transition to generate a USB
interrupt when the TRANF bit becomes set. Reset clears this bit.
1 = USB interrupt enabled for Start Of Frame
0 = USB interrupt disabled for Start Of Frame
1 = USB interrupt enabled for the Second End Of Frame Point
0 = USB interrupt disabled for the Second End Of Frame Point
1 = USB interrupt enabled for End-of-Packet sequence detection
0 = USB interrupt disabled for End-of-Packet sequence detection
1 = USB interrupt enabled for Bus Signal Transition
0 = USB interrupt disabled for Bus Signal Transition
Figure 9-5. USB SIE Timing Status Register (SIETSR)
$0057
RSTF
Bit 7
Universal Serial Bus Module (USB)
0**
RSTFR
= Unimplemented
6
0
0
LOCKF
5
0
LOCKFR
4
0
0
I/O Register Description of the HUB function
0** = Reset by POR only
SOFFR
Universal Serial Bus Module (USB)
3
0
0
EOF2FR
2
0
0
Advance Information
EOPFR
1
0
0
TRANFR
Bit 0
0
0
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