XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 95

• Manufacturer Part Number: XC68HC08KH12
• Description: MICROCONTROLLER
• Manufacturer: Motorola

8.4.7 Special Programming Exceptions
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
Table 8-1
notation):
The programming method described in
does not account for three possible exceptions. A value of zero for R, N,
or L is meaningless when used in the equations given. To account for
these exceptions:
2. Choose a practical PLL (crystal) reference frequency, f
3. Program the PLL registers accordingly:
the reference clock divider, R.
Frequency errors to the PLL are corrected at a rate of f
stability and lock time reduction, this rate must be as fast as
possible. The VCO frequency must be an integer multiple of this
rate. The relationship between the VCO frequency f
reference frequency f
Choose the reference divider R = 1 for fast lock. Choose a f
frequency with an integer divisor of f
a.
b.
c.
In the PRE bits of the PLL control register (PCTL), program
the binary equivalent of P.
In the PLL multiplier select register low (PMSL) and the PLL
multiplier select register high (PMSH), program the binary
equivalent of N.
In the PLL reference divider select register (PRDS), program
the binary coded equivalent of R.
provides a numeric example (numbers are in hexadecimal
Clock Generator Module (CGM)
6MHz
f
BUS
Table 8-1. CGM Numeric Example
hence: 48MHz
6MHz
f
RCLK
RCLK
is
f
VCLK
P
1
=
=
8.4.6 Programming the PLL
2
---------------- - f
2
---------------- - f
P
P
BUS
R
R
Clock Generator Module (CGM)
N
N
004
N
and solve for N.
RCLK
RCLK
Functional Description
Advance Information
R
1
VCLK
RCLK
RCLK
and the
/R. For
, and
RCLK
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