XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 229

no-image

XC68HC08KH12

Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
15.5.1 Port-E Keyboard Interrupt Functional Description
MC68HC(7)08KH12
MOTOROLA
Rev. 1.0
Writing to the KBEIE3–KBEIE0 bits in the keyboard interrupt enable
register independently enables or disables each port E pin as a
keyboard interrupt pin. Enabling a keyboard interrupt pin in port-E does
not enable its internal pullup device. Writing to the PEPE3–PEPE0 bits
in the keyboard interrupt enable register independently enables or
disables each port E pin pull-up device. A logic 0 applied to an enabled
keyboard interrupt pin latches a keyboard interrupt request.
A keyboard interrupt is latched when one or more keyboard pins goes
low after all were high. The MODEE bit in the keyboard status and
control register controls the triggering mode of the keyboard interrupt.
If the MODEE bit is set, the keyboard interrupt pins are both falling edge-
and low level-sensitive, and both of the following actions must occur to
clear a keyboard interrupt request:
If the keyboard interrupt is edge-sensitive only, a falling edge on a
keyboard pin does not latch an interrupt request if another
keyboard pin is already low. To prevent losing an interrupt request
on one pin because another pin is still low, software can disable
the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an
interrupt request is present as long as any keyboard pin is low.
Vector fetch or software clear — A vector fetch generates an
interrupt acknowledge signal to clear the interrupt request.
Software may generate the interrupt acknowledge signal by
writing a logic 1 to the ACKE bit in the keyboard status and control
register KBESCR. The ACKE bit is useful in applications that poll
the keyboard interrupt pins and require software to clear the
keyboard interrupt request. Writing to the ACKE bit prior to leaving
an interrupt service routine can also prevent spurious interrupts
due to noise. Setting ACKE does not affect subsequent transitions
on the keyboard interrupt pins. A falling edge that occurs after
writing to the ACKE bit latches another interrupt request. If the
keyboard interrupt mask bit, IMASKE, is clear, the CPU loads the
program counter with the vector address at locations $FFEC and
$FFED.
Keyboard Interrupt Module (KBI)
Port-E Keyboard Interrupt Block Diagram
Keyboard Interrupt Module (KBI)
Advance Information
229

Related parts for XC68HC08KH12