XC68HC08KH12 Motorola, XC68HC08KH12 Datasheet - Page 79
XC68HC08KH12
Manufacturer Part Number
XC68HC08KH12
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC08KH12.pdf
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7.6.3 Reset
7.6.4 Break Interrupts
7.6.5 Status Flag Protection in Break Mode
7.7 Low-Power Modes
MC68HC(7)08KH12
MOTOROLA
—
Rev. 1.0
All reset sources always have equal and highest priority and cannot be
arbitrated.
The break module can stop normal program flow at a software-
programmable break point by asserting its break interrupt output.
Section 16. Break Module
break state by forcing it to the SWI vector location. Refer to the break
interrupt subsection of each module to see how each module is affected
by the break state.
The SIM controls whether status flags contained in other modules can
be cleared during break mode. The user can select whether flags are
protected from being cleared by properly initializing the break clear flag
enable bit (BCFE) in the break flag control register (BFCR).
Protecting flags in break mode ensures that set flags will not be cleared
while in break mode. This protection allows registers to be freely read
and written during break mode without losing status flag information.
Setting the BCFE bit enables the clearing mechanisms. Once cleared in
break mode, a flag remains cleared even when break mode is exited.
Status flags with a two-step clearing mechanism — for example, a read
of one register followed by the read or write of another — are protected,
even when the first step is accomplished prior to entering break mode.
Upon leaving break mode, execution of the second step will clear the
flag as normal.
Executing the WAIT or STOP instruction puts the MCU in a low-power-
consumption mode for standby situations. The SIM holds the CPU in a
non-clocked state. The operation of each of these modes is described
System Integration Module (SIM)
(BREAK).) The SIM puts the CPU into the
System Integration Module (SIM)
Advance Information
Low-Power Modes
(See
79
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