C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 127

• Manufacturer Part Number: C8051F410DK
• Description: KIT DEV FOR C8051F41X
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F410DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F41x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F410
• Silicon Family Name: C8051F41x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F41x
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1314

15. Reset Sources
Reset circuitry allows the controller to be easily placed in a predefined default condition. On entry to this
reset state, the following occur:
•
•
•
•
All SFRs are reset to the predefined values noted in the SFR detailed descriptions. The contents of internal
data memory are unaffected during a reset; any previously stored data is preserved. However, since the
stack pointer SFR is reset, the stack is effectively lost, even though the data on the stack is not altered.
The Port I/O latches are reset to 0xFF (all logic ones) in open-drain mode. Weak pullups are enabled dur-
ing and after the reset. For V
exits the reset state.
On exit from the reset state, the program counter (PC) is reset, and the system clock defaults to the inter-
nal oscillator. Refer to
the system clock source. The Watchdog Timer is enabled with the system clock divided by 12 as its clock
source (
Program execution begins at location 0x0000.
Px.x
Px.x
CIP-51 halts program execution
Special Function Registers (SFRs) are initialized to their defined reset values
External Port pins are forced to a known state
Interrupts and timers are disabled.
smaRTClock
Section “25.3. Watchdog Timer Mode” on page 257
System
Clock
Comparator 0
RTC0RE
+
-
Section “19. Oscillators” on page 165
C0RSEF
Detector
Missing
Clock
(one-
shot)
Microcontroller
EN
Extended Interrupt
DD
CIP-51
Core
Handler
Monitor and power-on resets, the RST pin is driven low until the device
Figure 15.1. Reset Sources
WDT
PCA
EN
VDD
System Reset
Supply
Monitor
+
-
Rev. 1.1
Enable
(Software Reset)
SWRSF
for information on selecting and configuring
details the use of the Watchdog Timer).
'0'
Power On
C8051F410/1/2/3
Reset
Illegal Flash
Operation
(wired-OR)
Funnel
Reset
/RST
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