C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 151
C8051F410DK
Manufacturer Part Number
C8051F410DK
Description
KIT DEV FOR C8051F41X
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F410DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F410
Silicon Family Name
C8051F41x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F41x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1314
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F410DK
Manufacturer:
Silicon Labs
Quantity:
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18.2. Port I/O Initialization
Port I/O initialization consists of the following steps:
All Port pins must be configured as either analog or digital inputs. Any pins to be used as Comparator or
ADC inputs should be configured as an analog inputs. When a pin is configured as an analog input, its
weak pullup, digital driver, and digital receiver are disabled. This process saves power and reduces noise
on the analog input. Pins configured as digital inputs may still be used by analog peripherals; however, this
practice is not recommended.
Additionally, all analog input pins should be configured to be skipped by the Crossbar (accomplished by
setting the associated bits in PnSKIP). Port input mode is set in the PnMDIN register, where a ‘1’ indicates
a digital input, and a ‘0’ indicates an analog input. All port pins in analog mode must have a '1' set in the
corresponding Port Latch register. All pins default to digital inputs on reset. See SFR Definition 18.4 for the
PnMDIN register details.
Important Note: Port 0 pins are 5 V tolerant across the operating range of V
input current range of P0 pins when overdriven above V
drive modes for Port 0: Normal and High-Impedance. When the corresponding bit in P0ODEN is logic 0,
Normal Overdrive Mode is selected and the port pin requires 150 µA peak overdrive current when its volt-
age reaches approximately V
ance Overdrive Mode is selected and the port pin does not require any additional overdrive current. Pins
configured to High-Impedance Overdrive Mode consume slightly more power from V
ured to Normal Overdrive Mode. Note that Port 1 and Port 2 pins cannot be overdriven above V
have the same behavior as P0 in Normal Mode.
Step 1. Select the input mode (analog or digital) for all Port pins, using the Port Input Mode
Step 2. Select the output mode (open-drain or push-pull) for all Port pins, using the Port Output
Step 3. Select any pins to be skipped by the I/O Crossbar using the Port Skip registers (PnSKIP).
Step 4. Assign Port pins to desired peripherals using the XBRn registers.
Step 5. Enable the Crossbar (XBARE = ‘1’).
register (PnMDIN). If the pin is in analog mode, a '1' must also be written to the
corresponding Port Latch.
Mode register (PnMDOUT).
IO
+ 0.7 V. When the corresponding bit in P0ODEN is logic 1, High-Imped-
Rev. 1.1
IO
(when V
IO
is 3.3 V nominal). There are two over-
C8051F410/1/2/3
IO
. Figure 18.5 shows the
IO
than pins config-
IO
and
151
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