C8051F410DK Silicon Laboratories Inc, C8051F410DK Datasheet - Page 188

• Manufacturer Part Number: C8051F410DK
• Description: KIT DEV FOR C8051F41X
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F410DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F41x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F410
• Silicon Family Name: C8051F41x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F41x
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1314

C8051F410/1/2/3
Reads and writes of RAMDATA load the value at address RAMADDR into RTC0DAT. The following exam-
ple writes 0xA5 to address 0x20 in the RAM and reads the value back to a temporary variable:
// in 'C':
unsigned char temp = 0x00;
// Unlock the smaRTClock interface
RTC0KEY = 0xA5;
RTC0KEY = 0xF1;
// Enable the smaRTClock
RTC0ADR = 0x06; // address the RTC0CN register
RTC0DAT = 0x80; // enable the smaRTClock
while ((RTC0ADR & 0x80) == 0x80);
// Write to the smaRTClock RAM
RTC0ADR = 0x0E;// address the RAMADDR register
RTC0DAT = 0x20;// write the address of 0x20 to RAMADDR
while ((RTC0ADR & 0x80) == 0x80);// poll on the BUSY bit
RTC0ADR = 0x0F;// address the RAMDATA register
RTC0DAT = 0xA5;// write 0xA5 to RAM address 0x20
while ((RTC0ADR & 0x80) == 0x80);
// Read from the smaRTClock RAM
RTC0ADR = 0x0E;// address the RAMADDR register
RTC0DAT = 0x20;// write the address of 0x20 to RAMADDR
while ((RTC0ADR & 0x80) == 0x80);
RTC0ADR = 0x0F;
RTC0ADR |= 0x80; // initiate a read of the RAMDATA register
while ((RTC0ADR & 0x80) == 0x80);
temp = RTC0DAT; // read the value of RAM address 0x20
; in assembly:
188
Bit 7:
Internal Register Definition 20.9. RAMDATA: smaRTClock Backup RAM Data
; Unlock the smaRTClock interface
mov RTC0KEY, #0A5h
mov RTC0KEY, #0F1h
R/W
Bit7
Note: This register is not an SFR. It can only be accessed indirectly through RTC0ADR and RTC0DAT.
RAMDATA: smaRTClock Battery Backup RAM Data Bits.
These bits provide read and write access to the smaRTClock Backup RAM byte that is
selected by RAMADDR.
R/W
Bit6
// address the RAMDATA register
R/W
Bit5
R/W
Bit4
// poll on the BUSY bit
// poll on the BUSY bit
// poll on the BUSY bit
// poll on the BUSY bit
Rev. 1.1
R/W
Bit3
R/W
Bit2
R/W
Bit1
R/W
Bit0
smaRTClock
00000000
Reset Value
Address:
0x0F