MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 103

IC MPU 32B 220MHZ COLDF 208-FQFP

MCF5407AI220

Manufacturer Part Number
MCF5407AI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Datasheets

Specifications of MCF5407AI220

Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Maximum Clock Frequency
220 MHz
Operating Supply Voltage
1.8 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Program Memory Size
24KB
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Bcc
Operation:
Assembler Syntax: Bcc <label>
Attributes:
Description: If the condition is true, execution continues at (PC) + displacement. PC holds
the address of the instruction word for the Bcc instruction, plus two. The displacement is a
two’s-complement integer that represents the relative distance in bytes from the current PC
to the destination PC. If the 8-bit displacement field is 0, a 16-bit displacement (the word
after the instruction) is used. If the 8-bit displacement field is 0xFF, the 32-bit displacement
(longword after the instruction) is used. Condition code specifies one of the following tests:
Condition Codes:
Instruction Fields:
Instruction
Format:
• Condition field—Binary code for one of the conditions listed in the table.
• 8-bit displacement field—Two’s complement integer specifying the number of bytes
• 16-bit displacement field—Used when the 8-bit displacement contains 0x00.
• 32-bit displacement field—Used when the 8-bit displacement contains 0xFF.
CS(LO)
CC(HI)
Code
EQ
GE
between the branch and the next instruction to be executed if the condition is met.
Greater or equal
A branch to the next immediate instruction uses 16-bit
displacement because the 8-bit displacement field is 0x00.
15
0
Carry clear
Condition
Carry set
Operand sizes supported
Equal
14
1
Opcode present
If Condition True
Size = byte, word, long
Not affected
13
1
Bcc
12
Code
0
GT
LE
LS
HI
Then PC + d
32-bit displacement if 8-bit displacement = 0xFF
16-bit displacement if 8-bit displacement = 0x00
11
Chapter 2. ColdFire Core
Less or equal
Branch Conditionally
Low or same
Greater than
Condition
Condition
10
High
NOTE:
ColdFire Instruction Set Architecture Enhancements
9
V2, V3 Core
8
n
Code
NE
.b, .w
PL
LT
MI
Yes
7
PC
Condition
Less than
Not equal
Minus
6
Plus
5
8-bit displacement
4
V4 Core
Code
.b, .w, .l
VC
VS
Yes
3
Overflow clear
Overflow set
Condition
2
1
Bcc
2-37
0

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