MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 389

IC MPU 32B 220MHZ COLDF 208-FQFP

MCF5407AI220

Manufacturer Part Number
MCF5407AI220
Description
IC MPU 32B 220MHZ COLDF 208-FQFP
Manufacturer
Freescale Semiconductor
Series
MCF540xr
Datasheets

Specifications of MCF5407AI220

Core Processor
Coldfire V4
Core Size
32-Bit
Speed
220MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Maximum Clock Frequency
220 MHz
Operating Supply Voltage
1.8 V, 3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Program Memory Size
24KB
Cpu Speed
220MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3.3V
Rohs Compliant
Yes
For Use With
M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Table 15-3 shows relationships between PADAT bits and parallel port pins when PADAT is
accessed. The effect differs when the parallel port pin is an input or output.
The following results occur when a parallel port pin is configured as an input:
The following results occur when a parallel port pin is configured as an output:
These relationships are also described in Table 15-3.
PP Status PADAT R/W
Output
Input
• PADAT settings do not affect inputs. PADAT bit values determine the corresponding
• PADAT can be written to anytime. A read from PADAT returns values of
• When the PADAT is read, the value returned is the logic value on the pin.
• When the PADAT is written, the register contents are updated without affecting the
• When the PADAT is read, the register contents are returned and the pin is the logic
• When the PADAT is written, the register contents are updated and the pin is the logic
Table 15-3. Relationship between PADAT Register and Parallel Port Pin (PP)
Address
logic levels of pins configured as outputs.
corresponding pins configured as general-purpose I/O in the PAR and designated as
inputs by the PADDR.
logic value on the pin.
value of the register.
value of the register.
Reset
Field
R/W
Read
Write
Read
Write
Although external devices cannot access the MCF5407’s
on-chip memories or MBAR, they can access any parallel port
module registers in the SIM.
15
Register bit value is the pin’s logic value
Register contents updated
Register contents are returned
Register contents updated
Figure 15-3. Port A Data Register (PADAT)
Chapter 15. Parallel Port (General-Purpose I/O)
Effect on PADAT
0000_0000_0000_0000
Address MBAR+0x248
NOTE:
PADAT
R/W
No effect. Source of logic value
No effect on the logic value at the pin
Pin is the logic value of the register bit
Pin is the logic value of the register bit
Effect on PP
Parallel Port Operation
0
15-3

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