MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 211

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Intended Audience
Part II is intended for users who need to understand the interface between the ColdFire core
processor complex, described in Part I, and internal peripheral devices, described in
Part III. It includes a general description of the SIM and individual chapters that describe
components of the SIM, such as the phase-lock loop (PLL) timing source, interrupt
controller for both on-chip and external peripherals, configuration and operation of chip
selects, and the SDRAM controller.
Contents
Part II contains the following chapters:
• Chapter 6, “SIM Overview,” describes the SIM programming model, bus
• Chapter 7, “Phase-Locked Loop (PLL),” describes configuration and operation of
• Chapter 8, “I2C Module,” describes the MCF5407 I2C module, including I2C
• Chapter 9, “Interrupt Controller,” describes operation of the interrupt controller
• Chapter 10, “Chip-Select Module,” describes the MCF5407 chip-select
• Chapter 11, “Synchronous/Asynchronous DRAM Controller Module,” describes
arbitration, and system-protection functions for the MCF5407.
the PLL module. It describes in detail the registers and signals that support the PLL
implementation.
protocol, clock synchronization, and the registers in the I2C programing model. It
also provides extensive programming examples.
portion of the SIM. Includes descriptions of the registers in the interrupt controller
memory map and the interrupt priority scheme.
implementation, including the operation and programming model, which includes
the chip-select address, mask, and control registers.
configuration and operation of the synchronous/asynchronous DRAM controller
component of the SIM. It begins with a general description and brief glossary, and
System Integration Module (SIM)
Part II. System Integration Module (SIM)
Part II
II-i