MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 13

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

12.1
12.1.1
12.2
12.3
12.4
12.4.1
12.4.2
12.4.3
12.4.4
12.4.5
12.4.6
12.5
12.5.1
12.5.2
12.5.2.1
12.5.2.2
12.5.3
12.5.3.1
12.5.3.2
12.5.4
12.5.4.1
12.5.4.2
12.5.4.3
12.5.5
13.1
13.1.1
13.2
13.3
13.3.1
13.3.2
13.3.3
13.3.4
Paragraph
Number
Overview........................................................................................................... 12-1
DMA Signal Description .................................................................................. 12-2
DMA Transfer Overview.................................................................................. 12-4
DMA Controller Module Programming Model................................................ 12-5
DMA Controller Module Functional Description........................................... 12-11
Overview........................................................................................................... 13-1
General-Purpose Timer Units ........................................................................... 13-2
General-Purpose Timer Programming Model .................................................. 13-2
DMA Module Features ................................................................................. 12-2
Source Address Registers (SAR0–SAR3) .................................................... 12-7
Destination Address Registers (DAR0–DAR3) ........................................... 12-7
Byte Count Registers (BCR0–BCR3)........................................................... 12-7
DMA Control Registers (DCR0–DCR3)...................................................... 12-8
DMA Status Registers (DSR0–DSR3) ....................................................... 12-10
DMA Interrupt Vector Registers (DIVR0–DIVR3) ................................... 12-11
Transfer Requests (Cycle-Steal and Continuous Modes) ........................... 12-12
Data Transfer Modes .................................................................................. 12-12
Channel Initialization and Startup .............................................................. 12-13
Data Transfer .............................................................................................. 12-14
Termination................................................................................................. 12-18
Key Features ................................................................................................. 13-2
Timer Mode Registers (TMR0/TMR1) ........................................................ 13-3
Timer Reference Registers (TRR0/TRR1) ................................................... 13-4
Timer Capture Registers (TCR0/TCR1)....................................................... 13-4
Timer Counters (TCN0/TCN1) .................................................................... 13-5
Dual-Address Transfers .......................................................................... 12-12
Single-Address Transfers........................................................................ 12-13
Channel Prioritization ............................................................................. 12-13
Programming the DMA Controller Module ........................................... 12-13
External Request and Acknowledge Operation ...................................... 12-14
Auto-Alignment ...................................................................................... 12-17
Bandwidth Control.................................................................................. 12-18
DMA Controller Module
Peripheral Module
CONTENTS
Timer Module
Chapter 12
Chapter 13
Contents
Part III
Title
Number
Page
xiii