DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 140

• Manufacturer Part Number: DF2398TE20
• Description: IC H8S MCU FLASH 256K 120TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398TE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 120-TQFP, 120-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2398TE20; HD64F2398TE20

6.2.3
WCRH and WCRL are 8-bit readable/writable registers that select the number of program wait states for each area.
Program waits are not inserted in the case of on-chip memory or internal I/O registers.
WCRH and WCRL are initialized to H'FF by a power-on reset and in hardware standby mode. They are not initialized by
a manual reset* or in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
(1) WCRH
Bits 7 and 6—Area 7 Wait Control 1 and 0 (W71, W70): These bits select the number of program wait states when area
7 in external space is accessed while the AST7 bit in ASTCR is set to 1.
Bits 5 and 4—Area 6 Wait Control 1 and 0 (W61, W60): These bits select the number of program wait states when area
6 in external space is accessed while the AST6 bit in ASTCR is set to 1.
Rev.6.00 Oct.28.2004 page 110 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Wait Control Registers H and L (WCRH, WCRL)
Bit 7
W71
0
1
Bit 5
W61
0
1
:
:
W71
R/W
7
1
Bit 6
W70
0
1
0
1
Bit 4
W60
0
1
0
1
W70
R/W
6
1
Description
Program wait not inserted when external space area 7 is accessed
1 program wait state inserted when external space area 7 is accessed
2 program wait states inserted when external space area 7 is accessed
3 program wait states inserted when external space area 7 is accessed
Description
Program wait not inserted when external space area 6 is accessed
1 program wait state inserted when external space area 6 is accessed
2 program wait states inserted when external space area 6 is accessed
3 program wait states inserted when external space area 6 is accessed
W61
R/W
5
1
W60
R/W
4
1
W51
R/W
3
1
W50
R/W
2
1
W41
R/W
1
1
W40
R/W
0
1
(Initial value)
(Initial value)