DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 396

IC H8S MCU FLASH 256K 120TQFP

DF2398TE20

Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.2.6
Note: * These counters can be used as up/down-counters only in phase counting mode or when counting
The TCNT registers are 16-bit counters. The TPU has six TCNT counters, one for each channel.
The TCNT counters are initialized to H'0000 by a reset, and in hardware standby mode.
The TCNT counters cannot be accessed in 8-bit units; they must always be accessed as a 16-bit unit.
10.2.7
The TGR registers are 16-bit registers with a dual function as output compare and input capture registers. The TPU has 16
TGR registers, four each for channels 0 and 3 and two each for channels 1, 2, 4, and 5. TGRC and TGRD for channels 0
and 3 can also be designated for operation as buffer registers*. The TGR registers are initialized to H'FFFF by a reset, and
in hardware standby mode.
The TGR registers cannot be accessed in 8-bit units; they must always be accessed as a 16-bit unit.
Note: * TGR buffer register combinations are TGRA—TGRC and TGRB—TGRD.
10.2.8
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 5. TSTR is initialized to H'00
by a reset, and in hardware standby mode. When setting the operating mode in TMDR or setting the count clock in TCR,
first stop the TCNT counter.
Rev.6.00 Oct.28.2004 page 366 of 1016
REJ09B0138-0600H
Channel 0: TCNT0 (up-counter)
Channel 1: TCNT1 (up/down-counter*)
Channel 2: TCNT2 (up/down-counter*)
Channel 3: TCNT3 (up-counter)
Channel 4: TCNT4 (up/down-counter*)
Channel 5: TCNT5 (up/down-counter*)
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Bit
Initial value :
R/W
overflow/underflow on another channel. In other cases they function as up-counters.
Timer Counter (TCNT)
Timer General Register (TGR)
Timer Start Register (TSTR)
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
:
15
15
0
1
7
0
14
14
0
1
13
13
0
1
6
0
12
12
0
1
11
11
0
1
CST5
R/W
5
0
10
10
0
1
9
0
9
1
CST4
R/W
4
0
8
0
8
1
7
0
7
1
CST3
R/W
3
0
6
0
6
1
5
0
5
1
CST2
R/W
2
0
4
0
4
1
3
0
3
1
CST1
R/W
1
0
2
0
2
1
1
0
1
1
CST0
R/W
0
0
0
0
0
1

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