DF2398TE20 Renesas Electronics America, DF2398TE20 Datasheet - Page 413

IC H8S MCU FLASH 256K 120TQFP

DF2398TE20

Manufacturer Part Number
DF2398TE20
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398TE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2398TE20
HD64F2398TE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Examples of Cascaded Operation: Figure 10-22 illustrates the operation when counting upon TCNT2
overflow/underflow has been set for TCNT1, TGR1A and TGR2A have been designated as input capture registers, and
TIOC pin rising edge has been selected.
When a rising edge is input to the TIOCA1 and TIOCA2 pins simultaneously, the upper 16 bits of the 32-bit data are
transferred to TGR1A, and the lower 16 bits to TGR2A.
Figure 10-23 illustrates the operation when counting upon TCNT2 overflow/underflow has been set for TCNT1, and phase
counting mode has been designated for channel 2.
TCNT1 is incremented by TCNT2 overflow and decremented by TCNT2 underflow.
10.4.6
In PWM mode, PWM waveforms are output from the output pins. 0, 1, or toggle output can be selected as the output level
in response to compare match of each TGR.
Designating TGR compare match as the counter clearing source enables the period to be set in that register. All channels
can be designated for PWM mode independently. Synchronous operation is also possible.
There are two PWM modes, as described below.
PWM mode 1
PWM Modes
TCNT1
clock
TCNT1
TCNT2
clock
TCNT2
TIOCA1,
TIOCA2
TGR1A
TGR2A
TCLKC
TCLKD
TCNT2
TCNT1
H'FFFF
H'03A1
FFFD
Figure 10-22 Example of Cascaded Operation (1)
Figure 10-23 Example of Cascaded Operation (2)
0000
FFFE
FFFF
0000
H'0000
0001
H'03A2
H'03A2
H'0000
0001
0002
0001
Rev.6.00 Oct.28.2004 page 383 of 1016
0000
H'0001
FFFF
0000
REJ09B0138-0600H

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