R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 101

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ADBGV#RD0Z

Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ADBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R8A77850ADBGV#RD0ZR8A77850ADBGV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
R8A77850ADBGV#RD0Z
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(3-1) Load/store: 1 issue cycle
(3-2) AND.B, OR.B, XOR.B, TST.B: 3 issue cycles
(3-3) TAS.B: 4 issue cycles
(3-4) PREF, OCBI, OCBP, OCBWB, MOVCA.L, SYNCO: 1 issue cycle
(3-5) LDTLB: 1 issue cycle
(3-6) ICBI: 8 issue cycles + 5 cycles + 4 branch cycle
(3-7) PREFI: 5 issue cycles + 5 cycles + 4 branch cycle
(3-8) MOVLI.L: 1 issue cycle
(3-9) MOVCO.L: 1 issue cycle
(3-10) MOVUA.L: 2 issue cycles
I1
I1
MOV.[BWL], MOV.[BWL] @(d,GBR)
I2
I1
I1
I1
I1
I1
I1
I1
I1
I2
I3
I2
I2
I2
I2
I2
I2
I2
I2
I3
ID
I3
I3
I3
I3
I3
ID
I3
I3
I3
s1
ID
Figure 4.2 Instruction Execution Patterns (3)
s2
ID
ID
ID
ID
ID
ID
ID
ID
ID
ID
s1
s3
ID
E1s1
E1s1
S1
S1
S1
S1
ID
ID
s2
S1
S1
S1
WB
ID
E1S1
E2s2
E2s2
S2
S2
S2
S2
s3
5 cycles (min.)
ID
ID
S2
S2
S2
S1
E3s3
E1S1
E2S2
E3s3
WB
5 cycles (min.)
S3
S3
S3
S3
ID
S3
S3
S3
S2
E1S1
E3S3
E2S2
WB
WB
WB
WB
WB
WB
WB
WB
WB
S3
E2S2
E3S3
WB
WB
ID
E3S3
WB
ID
Rev.1.00 Jan. 10, 2008 Page 69 of 1658
E1s1
ID
E1s1
ID
WB
(Branch to the next instruction of ICBI.)
E2s2
E1s1
E1s1
E2s2
ID
ID
(Branch to the next instruction of PREFI.)
E3s3
E2s2
E1s1
E2s2
E1s1
E3s3
E3s3
E2s2
(I1)
WB
E3s3
E2s2
(I1)
WB
E3s3
WB
(I2)
REJ09B0261-0100
E3s3
WB
(I2)
WB
(I3)
4. Pipelining
WB
(I3)
(ID)
(ID)

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