R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 909

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ADBGV#RD0Z

Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ADBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Manufacturer:
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Quantity:
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Part Number:
R8A77850ADBGV#RD0Z
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Quantity:
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19.3.22 DE Signal Width Register (DEWR)
The DE signal width register (DEWR) sets the high-level width of the DE signal. The value is
retained during power-on reset and manual reset.
Internal update:
Internal update:
Bit
31 to 11 ⎯
10 to 0
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Bit Name
DEW
31
15
R
R
0
0
30
14
R
R
0
0
Initial
Value
All 0
Undefined R/W
29
13
R
R
0
0
28
12
R
R
0
0
R/W
R
27
11
R
R
0
0
Internal
Update
Yes
R/W
26
10
O
R
0
R/W
25
O
R
0
9
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
DE Signal Width
The high-level width of the DE signal should be
set in dot clock units.
If the HSYNC signal falls while the DE signal is
at high level, the DE signal also falls.
R/W
24
R
O
0
8
R/W
23
R
O
0
7
Rev.1.00 Jan. 10, 2008 Page 877 of 1658
R/W
22
R
O
0
6
DEW
R/W
21
O
R
0
5
R/W
20
O
R
0
4
R/W
19. Display Unit (DU)
19
R
O
0
3
REJ09B0261-0100
R/W
18
R
O
0
2
R/W
17
R
O
0
1
R/W
16
O
R
0
0

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