R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 585

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Figure 13.1 shows a block diagram of the PCIC.
The PCIC comprises two blocks, the PCI bus interface block and SuperHyway bus interface
block.
The PCI bus interface block comprises the PCI configuration register, local register, PCI master
controller, and PCI target controller.
The SuperHyway bus interface converts the access from the PCI bus interface into the access to
the SuperHyway bus, and converts the access from the SuperHyway bus (the CPU or DMAC) into
access to the PCI bus interface block. The SuperHyway bus interface block comprises PCIECR,
the access control block from the SuperHyway bus to the PCI bus, and the access control block
from the PCI bus to the SuperHyway bus.
The interrupt controller controls the issue of interrupts to INTC of this LSI.
Interrupt
SHwy clock input
SHwy bus
Interrupt control
interface
32 bytes x 2
32 bytes x 2
Data FIFO
Data FIFO
PCIECR
write
read
Figure 13.1 Block Diagram of PCIC
PCIC module
Register control
Master control
Target control
/local registers
Configuration
registers
Rev.1.00 Jan. 10, 2008 Page 553 of 1658
13. PCI Controller (PCIC)
PCIRESET
REQ0/REQOUT
GNT0/GNTIN
REQ[3:1]
GNT[3:1]
CBE[3:0]
DEVSEL
AD[31:0]
INT[B:D]
PCICLK input
FRAME
IDSEL
TRDY
STOP
PERR
SERR
LOCK
IRDY
INTA
PAR
REJ09B0261-0100