R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 822

IC SUPERH MPU ROMLESS 436-BGA

R8A77850ADBGV#RD0Z

Manufacturer Part Number
R8A77850ADBGV#RD0Z
Description
IC SUPERH MPU ROMLESS 436-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7780r
Datasheet

Specifications of R8A77850ADBGV#RD0Z

Core Processor
SH-4A
Core Size
32-Bit
Speed
600MHz
Connectivity
Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
Peripherals
DMA, POR, WDT
Number Of I /o
108
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1 V ~ 1.2 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
436-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Part Number:
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Company:
Part Number:
R8A77850ADBGV#RD0Z
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17. Power-Down Mode
Note:
Rev.1.00 Jan. 10, 2008 Page 790 of 1658
REJ09B0261-0100
Bit
16 to 6
5, 4
3 to 1
0
*
Bit Name
MSTP
[105:104]
MSTP100
The GDTA should be placed in module standby state after confirming that the operation
of the GDTA is completed. For the procedure, see section 20.7.1, Regarding Module
Stoppage.
Initial
Value
All 0
All 0
All 0
0
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
Module Stop Bit [105:104]
Specifies that the clock supply to the DMAC channels
of the corresponding bit is stopped
MSTP105: DMAC channels 11 to 6,
MSTP104: DMAC channels 5 to 0
0: DMAC operates
1: DMAC stopped
Reserved
These bits are always read as 0. The write value
should always be 0.
Module Stop Bit 100
Specifies that the clock supply to the GDTA module is
stopped
To stop the clock, set this bit to 1 after confirming that
the operation of GDTA is completed.
0: GDTA operates
1: GDTA stopped∗

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