R8A77850ADBGV#RD0Z Renesas Electronics America, R8A77850ADBGV#RD0Z Datasheet - Page 1588

• Manufacturer Part Number: R8A77850ADBGV#RD0Z
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV#RD0Z

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

31. Register List
Rev.1.00 Jan. 10, 2008 Page 1556 of 1658
REJ09B0261-0100
Module
Name
MMCIF
HAC
Name
Response register 7
Response register 8
Response register 9
Response register 10
Response register 11
Response register 12
Response register 13
Response register 14
Response register 15
Response register 16
CRC status register
Data timeout register
Data register
FIFO pointer clear register
DMA control register
Interrupt control register 2
Interrupt status register 2
Control and status register 0
Command/status address register 0 HACCSAR0 H'0000 0000
Command/status data register 0
PCM left channel register 0
PCM right channel register 0
TX interrupt enable register 0
TX status register 0
RX interrupt enable register 0
RX status register 0
HAC control register 0
Control and status register 1
Command/status address register 1 HACCSAR1 H'0000 0000
DTOUTR
DR
INTCR2
Abbrev.
RSPR7
RSPR8
RSPR9
RSPR10
RSPR11
RSPR12
RSPR13
RSPR14
RSPR15
RSPR16
RSPRD
FIFOCLR
DMACR
INTSTR2
HACCR0
HACCSDR0
HACPCML0 H'0000 0000
HACPCMR0
HACTIER0
HACTSR0
HACRIER0 H'0000 0000
HACRSR0
HACACR0
HACCR1
Power-on
Reset by
PRESET Pin/
WDT/H-UDI
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'FFFF
H'xxxx
H'00
H'00
H'00
H'0x
H'0000 0200
H'0000 0000
H'0000 0000
H'0000 0000
H'F000 0000
H'0000 0000
H'8400 0000
H'0000 0200
Manual Reset
by
WDT/Multiple
Exception
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'00
H'FFFF
H'xxxx
H'00
H'00
H'00
H'0x
H'0000 0200
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'F000 0000
H'0000 0000
H'0000 0000
H'8400 0000
H'0000 0200
H'0000 0000
Sleep/
Deep Sleep by
SLEEP
Instruction
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Module
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained